The present invention relates to memory devices and methods of operation thereof and, more particularly, to multilayer memory devices and methods of operation thereof.
Non-volatile memory devices, such as flash memory devices, are used in a variety of applications, such as in digital cameras, netbook computers and the like. A typical flash memory device has a NAND configuration in which each bit line is connected to a string of serially-connected floating gate transistor memory cells, which are programmed by applying a programming voltages to gate electrodes to selectively set the threshold voltages thereof. Such devices and methods of programming thereof are described, for example, in U.S. Pat. No. 5,973,962 to Kwon.
A variety of architectures have been developed to increase the capacity of flash memory devices. For example, structures have been developed that include multiple layers memory cells wherein vertical columns of the cells are connected in a NAND arrangement. Examples of such structures are described, for example, in U.S. Patent Application Publication No. 2009/0179257 to Yosuke et al.